diff options
| author | Jerome Brunet <[email protected]> | 2018-07-04 18:54:58 +0200 |
|---|---|---|
| committer | Jerome Brunet <[email protected]> | 2018-07-09 13:49:31 +0200 |
| commit | 7df533a7e3d2216e860ecf147ae8cee49bf133e9 (patch) | |
| tree | 6a95385f018bca6963984ef1252fc3edc7f32ade /tools/perf/scripts/python/Perf-Trace-Util/lib | |
| parent | 80d396b5118f448cb2206a509aba6917691a835e (diff) | |
clk: meson: add gen_clk
GEN_CLK is able to route several internal clocks to one of the SoC
pads. In the future, even more clocks could be made accessible using
cts_msr_clk - the clock measure block.
Signed-off-by: Jerome Brunet <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib')
0 files changed, 0 insertions, 0 deletions