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| author | Andy Lutomirski <[email protected]> | 2019-11-20 09:49:33 +0100 |
|---|---|---|
| committer | Peter Zijlstra <[email protected]> | 2019-11-21 19:37:43 +0100 |
| commit | 4c4fd55d3d59a41ddfa6ecba7e76928921759f43 (patch) | |
| tree | 6ba323bbb4d8e772ecb6679ce73b0d0260f8fcfe /tools/perf/scripts/python/Perf-Trace-Util/lib | |
| parent | 40ad2199580e248dce2a2ebb722854180c334b9e (diff) | |
x86/entry/32: Use %ss segment where required
When re-building the IRET frame we use %eax as an destination %esp,
make sure to then also match the segment for when there is a nonzero
SS base (ESPFIX).
[peterz: Changelog and minor edits]
Fixes: 3c88c692c287 ("x86/stackframe/32: Provide consistent pt_regs")
Signed-off-by: Andy Lutomirski <[email protected]>
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Cc: [email protected]
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib')
0 files changed, 0 insertions, 0 deletions