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authorColin Ian King <[email protected]>2021-09-28 14:46:54 +0100
committerAlexandre Belloni <[email protected]>2021-10-01 23:28:46 +0200
commitf3606687b447c41d28a011c98373b62b1cd52345 (patch)
treeb8d85f97457b4a32c252b7c17ad8ccf6be2302fb /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf
parent3109151c47343c80300177ec7704e0757064efdc (diff)
rtc: msc313: Fix unintentional sign extension issues with left shift of a u16
Shifting the u16 value returned by readw by 16 bits to the left will be promoted to a 32 bit signed int and then sign-extended to an unsigned long. If the top bit of the readw is set then the shifted value will be sign extended and the top 32 bits of the result will be set. Fixes: be7d9c9161b9 ("rtc: Add support for the MSTAR MSC313 RTC") Signed-off-by: Colin Ian King <[email protected]> Reviewed-by: Romain Perier <[email protected]> Signed-off-by: Alexandre Belloni <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf')
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