diff options
| author | Biju Das <[email protected]> | 2023-04-12 15:50:52 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2023-04-20 13:47:33 +0200 |
| commit | d61ae331d6f35183b38e0c992bc01bf15d8591c3 (patch) | |
| tree | 806b6b57d783c3ac90068e733992d2d9f73776bd /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf | |
| parent | 1707ce2d1e4d701db28ba2250d9d72dcf762babc (diff) | |
tty: serial: sh-sci: Add support for tx end interrupt handling
As per the RZ/G2L users hardware manual (Rev.1.20 Sep, 2022), section
23.3.7 Serial Data Transmission (Asynchronous Mode), it is mentioned
that, set the SCR.TIE bit to 0 and SCR.TEIE bit to 1, after the last
data to be transmitted are written to the TDR.
This will generate tx end interrupt and in the handler set SCR.TE and
SCR.TEIE to 0.
Signed-off-by: Biju Das <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf')
0 files changed, 0 insertions, 0 deletions