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authorLokesh Vutla <[email protected]>2020-03-05 13:57:13 +0530
committerDaniel Lezcano <[email protected]>2020-03-16 12:40:36 +0100
commitaff7665dc64b60c1f93d6e52fde297ae6b8999ae (patch)
treef45e243128959e29fca92d2683d5b5fddc41c9ef /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf
parentb34677b0999a7c0de45e57b780508c14cb438ed8 (diff)
clocksource/drivers/timer-ti-dm: Do not update counter on updating the period
Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value in Load register(OMAP_TIMER_LOAD_REG) into Counter register (OMAP_TIMER_COUNTER_REG). omap_dm_timer_set_load() writes into trigger register every time load register is updated. When timer is configured in pwm mode, this causes disruption in current pwm cycle, which is not expected especially when pwm is used as PPS signal for synchronized PTP clocks. So do not write into trigger register on updating the period. Tested-by: Tony Lindgren <[email protected]> Signed-off-by: Lokesh Vutla <[email protected]> Signed-off-by: Daniel Lezcano <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf')
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