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authorSudeep Holla <[email protected]>2022-07-04 11:15:53 +0100
committerSudeep Holla <[email protected]>2022-07-04 16:22:28 +0100
commit38db9b95464f82fed28794afe0214d9439d86f7c (patch)
tree7c9832e04afeeb5b21fce2d7da89809c8ef9eb93 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf
parent521103134a0d07774c8b17f25ff0ef70cbd56c9d (diff)
arch_topology: Add support to parse and detect cache attributes
Currently ACPI populates just the minimum information about the last level cache from PPTT in order to feed the same to build sched_domains. Similar support for DT platforms is not present. In order to enable the same, the entire cache hierarchy information can be built as part of CPU topoplogy parsing both on ACPI and DT platforms. Note that this change builds the cacheinfo early even on ACPI systems, but the current mechanism of building llc_sibling mask remains unchanged. Link: https://lore.kernel.org/r/[email protected] Tested-by: Ionela Voinescu <[email protected]> Tested-by: Conor Dooley <[email protected]> Reviewed-by: Gavin Shan <[email protected]> Signed-off-by: Sudeep Holla <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf')
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