diff options
| author | Guillaume La Roque <[email protected]> | 2019-05-14 10:26:52 +0200 |
|---|---|---|
| committer | Linus Walleij <[email protected]> | 2019-05-23 09:24:46 +0200 |
| commit | 2484ae57c26a9ad04c71bd82e5349ef35f186219 (patch) | |
| tree | 4c9acfb4584771f9e5ec8e61e459997d003dab49 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf | |
| parent | 6ea3e3bbef3705225bb675a8c57af58420c23f81 (diff) | |
pinctrl: meson: g12a: add DS bank value
add drive-strength bank regiter and bit value for G12A SoC
Signed-off-by: Guillaume La Roque <[email protected]>
Reviewed-by: Martin Blumenstingl <[email protected]>
Signed-off-by: Linus Walleij <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf')
0 files changed, 0 insertions, 0 deletions