diff options
| author | Sifan Naeem <[email protected]> | 2015-04-06 14:29:06 -0700 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2015-04-08 11:35:54 +0100 |
| commit | ede8342bf63166e8d8fc3c05fc0985b27cc8186b (patch) | |
| tree | 372bd0c2545b114affa74d01fb99506312bb8342 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace | |
| parent | b6fe39770aa63d14129bc7e061c95cfc3cb1419a (diff) | |
spi: img-spfi: Setup TRANSACTION register before CONTROL register
Setting the transfer length in the TRANSACTION register after the
CONTROL register is programmed causes intermittent timeout issues in
SPFI transfers when using the SPI framework to control the CS GPIO
lines. To avoid this issue, set transfer length before programming
the CONTROL register.
Signed-off-by: Sifan Naeem <[email protected]>
Signed-off-by: Andrew Bresticker <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
0 files changed, 0 insertions, 0 deletions