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authorLucas Stach <dev@lynxeye.de>2016-05-05 10:16:44 -0400
committerAlex Deucher <alexander.deucher@amd.com>2016-05-05 11:14:53 -0400
commite3c00d87845ab375f90fa6e10a5e72a3a5778cd3 (patch)
treee7763f8880e358e5959eb36728fd4494e6ae95f1 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace
parent1a738347df2ee4977459a8776fe2c62196bdcb1b (diff)
drm/radeon: fix PLL sharing on DCE6.1 (v2)
On DCE6.1 PPLL2 is exclusively available to UNIPHYA, so it should not be taken into consideration when looking for an already enabled PLL to be shared with other outputs. This fixes the broken VGA port (TRAVIS DP->VGA bridge) on my Richland based laptop, where the internal display is connected to UNIPHYA through a TRAVIS DP->LVDS bridge. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=78987 v2: agd: add check in radeon_get_shared_nondp_ppll as well, drop extra parameter. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
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