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author | Jason Gunthorpe <[email protected]> | 2019-10-09 13:09:31 -0300 |
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committer | Jason Gunthorpe <[email protected]> | 2019-10-28 16:41:14 -0300 |
commit | b70d785d237c0d3e4235c511f38f8ce64620f945 (patch) | |
tree | 67b239743d643a9ce5b5d45cdbd1018f7dcb38bd /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace | |
parent | 3389baa831b6a09e3c96e2a6283a1b952be2f0cd (diff) |
RDMA/mlx5: Avoid double lookups on the pagefault path
Now that the locking is simplified combine pagefault_implicit_mr() with
implicit_mr_get_data() so that we sweep over the idx range only once,
and do the single xlt update at the end, after the child umems are
setup.
This avoids double iteration/xa_loads plus the sketchy failure path if the
xa_load() fails.
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Artemy Kovalyov <[email protected]>
Signed-off-by: Jason Gunthorpe <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
0 files changed, 0 insertions, 0 deletions