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authorSebastian Hesselbarth <[email protected]>2012-11-17 15:22:22 +0100
committerThomas Petazzoni <[email protected]>2012-11-20 14:34:08 +0100
commit97fa4cf442ff2872000d9110686371775795a32b (patch)
tree24a2347bd5f5620dd5ac6a7d9964029c13245231 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace
parentf4a75d2eb7b1e2206094b901be09adb31ba63681 (diff)
clk: mvebu: add mvebu core clocks.
This driver allows to provide DT clocks for core clocks found on Marvell Kirkwood, Dove & 370/XP SoCs. The core clock frequencies and ratios are determined by decoding the Sample-At-Reset registers. Although technically correct, using a divider of 0 will lead to div_by_zero panic. Let's use a ratio of 0/1 instead to fail later with a zero clock. Signed-off-by: Gregory CLEMENT <[email protected]> Signed-off-by: Sebastian Hesselbarth <[email protected]> Signed-off-by: Andrew Lunn <[email protected]> Tested-by Gregory CLEMENT <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace')
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