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authorDmitry Baryshkov <[email protected]>2024-05-12 01:04:14 +0300
committerBjorn Andersson <[email protected]>2024-05-27 11:44:30 -0500
commitb73ed308f9f69499fde654d63ed6c1fd44870793 (patch)
tree27a0986a8f19f6dbabf62c1410a1433dc9dee2f2 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
parent93830ef7bbcdfd440fd6d93adfb59f20560950a5 (diff)
arm64: dts: qcom: x1e80100: describe USB signals properly
Follow example of other platforms. Rename HS graph nodes to contain 'dwc3_hs' and link SS lanes from DWC3 controllers to QMP PHYs. Signed-off-by: Dmitry Baryshkov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
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