diff options
| author | Bin Meng <[email protected]> | 2017-09-11 02:41:51 -0700 |
|---|---|---|
| committer | Cyrille Pitchen <[email protected]> | 2017-10-11 09:40:06 +0200 |
| commit | 9cbb035cc111f5c6655f1026d4e7918282f6e137 (patch) | |
| tree | 9f25b6b08e07576d07043be7ec832bfeb6809b9a /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py | |
| parent | 824af37ef2d054d1f89bd2b9125755a4acc37332 (diff) | |
spi-nor: intel-spi: Fix number of protected range registers for BYT/LPT
The number of protected range registers is not the same on BYT/LPT/
BXT. GPR0 only exists on Apollo Lake and its offset is reserved on
other platforms.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Mika Westerberg <[email protected]>
Signed-off-by: Cyrille Pitchen <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py')
0 files changed, 0 insertions, 0 deletions