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| author | Chuanjia Liu <chuanjia.liu@mediatek.com> | 2021-08-23 11:27:56 +0800 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2021-08-26 13:48:27 +0100 |
| commit | 87e8657ba99cac87b84c7f8ead91b44d88345504 (patch) | |
| tree | 646d73894093619886632029b25b205582918839 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py | |
| parent | aa6eca5b81663a59e1a8765481eb48fa2edfab05 (diff) | |
PCI: mediatek: Add new method to get shared pcie-cfg base address
For the new dts format, add a new method to get
shared pcie-cfg base address and use it to configure
the PCIECFG controller
Link: https://lore.kernel.org/r/20210823032800.1660-3-chuanjia.liu@mediatek.com
Signed-off-by: Chuanjia Liu <chuanjia.liu@mediatek.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py')
0 files changed, 0 insertions, 0 deletions