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authorAurabindo Pillai <[email protected]>2022-09-01 15:27:36 -0400
committerAlex Deucher <[email protected]>2022-09-13 14:33:00 -0400
commit70c04ad8441a60ee65ca2e1c40fac04882ba09f8 (patch)
treed712214acfb9a24527f77e6fbdd9242ed23995c0 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
parent410e747401a3121cffba6ecb932f5df596799550 (diff)
drm/amd/display: Fix register definitions for DCN32/321
[Why & How] Fix the instatiation sequence for MPC registers and add a few other missing register definitions that were ommited erroneously when copying them over to enable runtime initialization of reigster offsets for DCN32/321 Tested-by: Daniel Wheeler <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Aurabindo Pillai <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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