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| author | Dmitry Baryshkov <[email protected]> | 2022-11-10 22:22:40 +0300 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2023-01-12 22:48:41 +0530 |
| commit | 61f21e0efa4b9770e5af0b0830c0548a3f5ad8ba (patch) | |
| tree | 8f9b55878ad173b2ad107eb261847f3697083606 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py | |
| parent | bbe207a1aba191eb240244193c2aa0a2b1ef271d (diff) | |
phy: qcom-qmp-pcie-msm8996: rework regs layout arrays
Use symbolic names for the values inside reg layout arrays. New register
names are added following the PCS register layout that is used by the
particular PHY.
Note: ipq8074 tables appear to use a mixture of v2 and v3 registers.
This might need additional fixes.
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py')
0 files changed, 0 insertions, 0 deletions