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| author | Alexandre Courbot <acourbot@nvidia.com> | 2017-03-29 18:31:14 +0900 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2017-04-06 14:39:04 +1000 |
| commit | 59d5592d3bf2e70b9c56212cf5c9f1bfab6f0147 (patch) | |
| tree | dd308969384a71f902aad3e96bdaf6c57f5d15cd /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py | |
| parent | c79505c1f9e14d7aa9eb3b085c799d77950b1e20 (diff) | |
drm/nouveau/secboot: add GP10B support
GP10B's secboot is largely similar to GM20B's. Only differences are MC
base address and the fact that GPCCS is also securely managed.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py')
0 files changed, 0 insertions, 0 deletions