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authorRiana Tauro <[email protected]>2024-05-24 12:39:16 +0530
committerRodrigo Vivi <[email protected]>2024-05-28 12:29:43 -0400
commit38e8c4184ea0eebe478a9e6fc8d1062561223429 (patch)
treebad0e89727b1f236c61acd934a63a0dd35fe92fe /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
parent9276bcc22f52ab52ae77b7b19133943d88b9a3f8 (diff)
drm/xe: Enable Coarse Power Gating
Enable power gating for all units and sub-pipes that are disabled by default. v2: change the init function name use symmetric calls for enable/disable pg re-pharase commit message (Rodrigo) modify the sub-pipe power gating condition v3: set hysteresis value for render and media when GuC PC is disabled skip CPG for PVC (Vinay) v4: rebase Signed-off-by: Riana Tauro <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> #v2 Reviewed-by: Vinay Belgaumkar <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Signed-off-by: Rodrigo Vivi <[email protected]>
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