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authorMatt Roper <[email protected]>2022-02-17 17:03:28 -0800
committerLucas De Marchi <[email protected]>2022-02-18 16:03:31 -0800
commit2f8a6699c90df7616e5dd03cc0c6ea22d589eba2 (patch)
tree6892cf7cb2c6bb51a39b6dba92fa2d34006114f9 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
parent9b693453a4eba392bbb62169243f9513366a253e (diff)
drm/i915/dg2: Enable 5th port
DG2 supports a 5th display output which the hardware refers to as "TC1," even though it isn't a Type-C output. This behaves similarly to the TC1 on past platforms with just a couple minor differences: * DG2's TC1 bit in SDEISR is at bit 25 rather than 24 as it is on ICP/TGP/ADP. * DG2 doesn't need the hpd inversion setting that we had to use on DG1 v2: intel_ddi_init(dev_priv, PORT_TC1); [Matt] Cc: Swathi Dhanavanthri <[email protected]> Cc: Lucas De Marchi <[email protected]> Cc: José Roberto de Souza <[email protected]> Signed-off-by: Matt Roper <[email protected]> Signed-off-by: Ramalingam C <[email protected]> Reviewed-by: Lucas De Marchi <[email protected]> Signed-off-by: Lucas De Marchi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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