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authorHaggai Abramonvsky <[email protected]>2015-06-04 19:30:38 +0300
committerDavid S. Miller <[email protected]>2015-06-04 16:41:01 -0700
commit01949d0109ee5fae33752f0db99a36f1619e1873 (patch)
tree46cafa0aa30e02afeee05ee7025fce98cc1b9cac /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
parent7db22ffb5b09d9b77baf057ca034d966e58df1e1 (diff)
net/mlx5_core: Enable XRCs and SRQs when using ISSI > 0
When working in ISSI > 0 mode, the model exposed by the device for XRCs and SRQs is different. XRCs use XRC SRQs and plain SRQs are based on RPM (Receive Memory Pool). Add helper functions to create, modify, query, and arm XRC SRQs and RMPs. Signed-off-by: Haggai Abramovsky <[email protected]> Signed-off-by: Or Gerlitz <[email protected]> Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py')
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