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authorRodrigo Vivi <[email protected]>2022-08-31 17:45:38 -0400
committerRodrigo Vivi <[email protected]>2022-09-01 14:24:41 -0400
commit018a7bdbb090b9155a6509a0d1a684db4afaa5b1 (patch)
treebbd63c698ac8efe727f3078d743e5a67eb012091 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/Util.py
parentff4e0cafe845110c9b7fe26eb8a6b49d60a1288c (diff)
drm/i915/slpc: Let's fix the PCODE min freq table setup for SLPC
We need to inform PCODE of a desired ring frequencies so PCODE update the memory frequencies to us. rps->min_freq and rps->max_freq are the frequencies used in that request. However they were unset when SLPC was enabled and PCODE never updated the memory freq. v2 (as Suggested by Ashutosh): if SLPC is in use, let's pick the right frequencies from the get_ia_constants instead of the fake init of rps' min and max. v3: don't forget the max <= min return v4: Move all the freq conversion to intel_rps.c. And the max <= min check to where it belongs. v5: (Ashutosh) Fix old comment s/50 HZ/50 MHz and add a doc explaining the "raw format" Fixes: 7ba79a671568 ("drm/i915/guc/slpc: Gate Host RPS when SLPC is enabled") Cc: <[email protected]> # v5.15+ Cc: Ashutosh Dixit <[email protected]> Tested-by: Sushma Venkatesh Reddy <[email protected]> Signed-off-by: Rodrigo Vivi <[email protected]> Reviewed-by: Ashutosh Dixit <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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