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| author | Dmitry Baryshkov <[email protected]> | 2023-01-13 23:21:37 +0200 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2023-01-18 22:54:49 +0530 |
| commit | c08436c1569e54f712013f3b2fbc3ef3f739a7b1 (patch) | |
| tree | 8d38fb8f6769be04b6eed6d90128864cf8d63f77 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py | |
| parent | aa14cff16b9d09166c6e1261231a2a1c561adea1 (diff) | |
phy: qcom-qmp-pcie: fix the regs layout table for sm8450 gen3x1 PHY
The sm8450 gen3x1 PHY references the pciephy_v4_regs_layout while the
PHY itself uses v5 regs. While there are only minor differences between
v4 and v5 regs and none of them concerns registers mentions in
regs_layout, switch the PHY to use pciephy_v5_regs_layout to remove
possible confusion.
Fixes: bbe207a1aba1 ("phy: qcom-qmp-pcie: rename regs layout arrays")
Signed-off-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py')
0 files changed, 0 insertions, 0 deletions