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| author | Cezary Rojewski <[email protected]> | 2022-03-11 16:35:41 +0100 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2022-03-11 16:24:07 +0000 |
| commit | b27f452317236b0cbaa94c4498f8241e2ad871b1 (patch) | |
| tree | e67ea17c5e924c67119ee219d1334db2690a1929 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py | |
| parent | 215e67b2d2de1d8d34a53c440b9a19a732ee6fb0 (diff) | |
ASoC: Intel: avs: General code loading flow
Code loading is a complex procedure and requires combined effort of DMA
and IPCs. With IPCs already in place, lay out ground for specific DMA
transfer operations.
Signed-off-by: Amadeusz Sławiński <[email protected]>
Signed-off-by: Cezary Rojewski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py')
0 files changed, 0 insertions, 0 deletions