diff options
| author | Maxime Ripard <[email protected]> | 2019-08-21 15:06:54 +0200 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2019-08-21 14:16:02 +0100 |
| commit | 9e8a93ac27d101e0ace024196a4bc3386568cc00 (patch) | |
| tree | 951e024bc7966cc17d88e97b251ac7bd408b90fc /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py | |
| parent | 5389f4765789e4ecf9831bc968562befdd2f3bee (diff) | |
ASoC: sun4i-i2s: Use the actual format width instead of an hardcoded one
The LRCK period field in the FMT0 register holds the number of LRCK period
for one channel in I2S mode.
This has been hardcoded to 32, while it really should be the physical width
of the format, which creates an improper clock when using a 16bit format,
with the i2s controller as LRCK master.
Fixes: 7d2993811a1e ("ASoC: sun4i-i2s: Add support for H3")
Signed-off-by: Maxime Ripard <[email protected]>
Link: https://lore.kernel.org/r/f08a0c3605cd1d79752b38d704690190183f7865.1566392800.git-series.maxime.ripard@bootlin.com
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py')
0 files changed, 0 insertions, 0 deletions