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authorVille Syrjälä <[email protected]>2020-12-07 22:35:11 +0200
committerVille Syrjälä <[email protected]>2021-01-21 21:23:13 +0200
commit5ec346476e795089b7dac8ab9dcee30c8d80ad84 (patch)
tree3260688ff7289e503276f227b838d61ef977949f /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py
parenta089301d8dbf738e716e444f02f93a63e181b47d (diff)
drm/i915: Fix ICL MG PHY vswing handling
The MH PHY vswing table does have all the entries these days. Get rid of the old hacks in the code which claim otherwise. This hack was totally bogus anyway. The correct way to handle the lack of those two entries would have been to declare our max vswing and pre-emph to both be level 2. Cc: José Roberto de Souza <[email protected]> Cc: Clinton Taylor <[email protected]> Fixes: 9f7ffa297978 ("drm/i915/tc/icl: Update TC vswing tables") Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected] Reviewed-by: Imre Deak <[email protected]> Reviewed-by: José Roberto de Souza <[email protected]>
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