diff options
| author | Abel Vesa <[email protected]> | 2023-01-18 00:41:47 +0200 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2023-02-02 18:33:20 +0530 |
| commit | 5b8154ce500944c6d70c5d3189341c47e5efb4f8 (patch) | |
| tree | 794530f25e98bcd670be73a91577091f63b7ab97 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py | |
| parent | c9736600a64f7d9b374838d065ef85f6bf6c3dd4 (diff) | |
phy: qcom-qmp: pcs-ufs: Add v6 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB,
UFS and PCIE g3x2. Add the new PCS UFS specific offsets in a dedicated
header file.
Signed-off-by: Abel Vesa <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py')
0 files changed, 0 insertions, 0 deletions