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authorNicholas Piggin <[email protected]>2022-01-23 21:47:25 +1000
committerMichael Ellerman <[email protected]>2022-05-13 21:33:26 +1000
commit361234d7a1c9a5290d33e35d49821b7a32a32854 (patch)
treea1aa737a6eaf5d55c1453643d01059205739f55c /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py
parent861604614a94a7aabc111e4a18aaf5d56d270e8a (diff)
KVM: PPC: Book3S HV P9: Optimise loads around context switch
It is better to get all loads for the register values in flight before starting to switch LPID, PID, and LPCR because those mtSPRs are expensive and serialising. This also just tidies up the code for a potential future change to the context switching sequence. Signed-off-by: Nicholas Piggin <[email protected]> Reviewed-by: Fabiano Rosas <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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