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authorArchit Taneja <architt@codeaurora.org>2018-01-17 15:04:48 +0530
committerRob Clark <robdclark@gmail.com>2018-02-20 10:41:21 -0500
commit35f135a3b1cfeee4ef2bd92755debd0bcf60cb9f (patch)
tree6f36d3ae1a9ffaf6ce2caf335c2b309cd27738d4 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py
parent31767e00e428c891343f94e5a94909bb7a642bcf (diff)
dt-bindings: display: msm/dsi: Add updates for SDM845
SDM845 uses a newer revision (v2.0+) of the 6G DSI controller. This revision has another clock input at the block boundary called the byte interface clock. Specify this new clock in the binding. A 10nm DSI PHY is used along with the controller. Add a compatible string for it and specify its base address/regulator supply needs. Cc: Rob Herring <robh@kernel.org> Cc: devicetree@vger.kernel.org Signed-off-by: Archit Taneja <architt@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py')
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