aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py
diff options
context:
space:
mode:
authorCristian Ciocaltea <[email protected]>2023-03-21 23:56:19 +0200
committerGreg Kroah-Hartman <[email protected]>2023-03-29 11:06:44 +0200
commit28cbc3a4473fa607e4501112d700585b1ee4ce75 (patch)
tree146ef7e40e4802a33c93ef978b78b0af0ec856e7 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py
parent646a203a661bdb5777dd57fb1abd76fc6ed01bc1 (diff)
ARM: dts: sunxi: h3/h5: Switch dma-names order for snps,dw-apb-uart nodes
Commit 370f696e4474 ("dt-bindings: serial: snps-dw-apb-uart: add dma & dma-names properties") documented dma-names property to handle Allwinner D1 dtbs_check warnings, but relies on the rx->tx ordering, which is the reverse of what a bunch of different boards expect. The initial proposed solution was to allow a flexible dma-names order in the binding, due to potential ABI breakage concerns after fixing the DTS files. But luckily the Allwinner boards are not affected, since they are using a shared DMA channel for rx and tx. Hence, the first step in fixing the inconsistency was to change dma-names order in the binding to tx->rx. Do the same for the snps,dw-apb-uart nodes in the DTS file. Signed-off-by: Cristian Ciocaltea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/SchedGui.py')
0 files changed, 0 insertions, 0 deletions