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| author | Bjorn Helgaas <[email protected]> | 2012-12-06 06:40:07 +0000 |
|---|---|---|
| committer | Jeff Kirsher <[email protected]> | 2013-01-18 04:54:59 -0800 |
| commit | ffe0b2ff17e1d59d33334767e07e8141de4bd5c8 (patch) | |
| tree | 92aba416877934e9dc3339477c3a05677882b6dc /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py | |
| parent | 203e41514a557b71c4c42b4bb2912b56fa0c2fdc (diff) | |
e1000e: Use standard #defines for PCIe Capability ASPM fields
Use the standard #defines for PCIe Capability ASPM fields.
Previously we used PCIE_LINK_STATE_L0S and PCIE_LINK_STATE_L1 directly, but
these are defined for the Linux ASPM interfaces, e.g.,
pci_disable_link_state(), and only coincidentally match the actual register
bits. PCIE_LINK_STATE_CLKPM, also part of that interface, does not match
the register bit.
Signed-off-by: Bjorn Helgaas <[email protected]>
CC: [email protected]
Acked-by: Bruce Allan <[email protected]>
Tested-by: Aaron Brown <[email protected]>
Signed-off-by: Jeff Kirsher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
0 files changed, 0 insertions, 0 deletions