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author | Gregory CLEMENT <[email protected]> | 2023-12-12 17:34:33 +0100 |
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committer | Thomas Bogendoerfer <[email protected]> | 2023-12-21 15:30:03 +0100 |
commit | f99c37d562250cbceed262723f91944c981eeb7b (patch) | |
tree | e5967cbfabbb6481e970de159b9523f5e220d9fa /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py | |
parent | 01940cd4a6b9c47995a0cdaaafdd459b0d2221a2 (diff) |
MIPS: compressed: Use correct instruction for 64 bit code
The code clearing BSS already use macro or use correct instruction
depending if the CPU is 32 bits or 64 bits. However, a few
instructions remained 32 bits only.
By using the accurate MACRO, it is now possible to deal with memory
address beyond 32 bits. As a side effect, when using 64bits processor,
it also divides the loop number needed to clear the BSS by 2.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Florian Fainelli <[email protected]>
Signed-off-by: Gregory CLEMENT <[email protected]>
Signed-off-by: Thomas Bogendoerfer <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
0 files changed, 0 insertions, 0 deletions