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authorJoel Stanley <[email protected]>2014-07-08 16:08:20 +0930
committerBenjamin Herrenschmidt <[email protected]>2014-07-11 12:55:07 +1000
commitf73128f4f680e8be68cda831f2710214559583cb (patch)
treef8a4f75ad45cfd8d6efe97bf7d17c6ae1554fee5 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parentc733cf83bbd2b0978456822cdac8c726085dcc14 (diff)
powerpc/kvm: Remove redundant save of SIER AND MMCR2
These two registers are already saved in the block above. Aside from being unnecessary, by the time we get down to the second save location r8 no longer contains MMCR2, so we are clobbering the saved value with PMC5. MMCR2 primarily consists of counter freeze bits. So restoring the value of PMC5 into MMCR2 will most likely have the effect of freezing counters. Fixes: 72cde5a88d37 ("KVM: PPC: Book3S HV: Save/restore host PMU registers that are new in POWER8") Cc: [email protected] Signed-off-by: Joel Stanley <[email protected]> Acked-by: Michael Ellerman <[email protected]> Acked-by: Paul Mackerras <[email protected]> Reviewed-by: Alexander Graf <[email protected]> Signed-off-by: Benjamin Herrenschmidt <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
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