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authorPalmer Dabbelt <[email protected]>2023-12-20 10:48:17 -0800
committerPalmer Dabbelt <[email protected]>2023-12-20 10:48:17 -0800
commite015eb628c450ad54105717848e898c0a1524ea3 (patch)
tree47127324bca486434bb93f3994d2ebe684bbc840 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parent4a6b93f5629668d1dc8fa5945657fdd124629c55 (diff)
parentedf955647269422e387732870d04fc15933a25ea (diff)
Merge patch series "riscv: Use READ_ONCE()/WRITE_ONCE() for pte accesses"
Alexandre Ghiti <[email protected]> says: This series is a follow-up for riscv of a recent series from Ryan [1] which converts all direct dereferences of pte_t into a ptet_get() access. The goal here for riscv is to use READ_ONCE()/WRITE_ONCE() for all page table entries accesses to avoid any compiler transformation when the hardware can concurrently modify the page tables entries (A/D bits for example). I went a bit further and added pud/p4d/pgd_get() helpers as such concurrent modifications can happen too at those levels. [1] https://lore.kernel.org/all/[email protected]/ * b4-shazam-merge: riscv: Use accessors to page table entries instead of direct dereference riscv: mm: Only compile pgtable.c if MMU mm: Introduce pudp/p4dp/pgdp_get() functions riscv: Use WRITE_ONCE() when setting page table entries Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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