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authorRobin Murphy <[email protected]>2021-03-05 17:33:18 +0000
committerSudeep Holla <[email protected]>2021-03-15 13:24:09 +0000
commitd9df28ba587f646b50a7e307bbb0e6f85c7deb21 (patch)
tree901782ca9a8a4e3e66195034d2d0bbe6d6836eef /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parent4ac4d146cb63cd4709c4729e5eca563e38106195 (diff)
arm64: dts: juno: Enable more SMMUs
Now that PCI inbound window restrictions are handled generically between the of_pci resource parsing and the IOMMU layer, and described in the Juno DT, we can finally enable the PCIe SMMU without the risk of DMA mappings inadvertently allocating unusable addresses. Similarly, the relevant support for IOMMU mappings for peripheral transfers has been hooked up in the pl330 driver for ages, so we can happily enable the DMA SMMU without that breaking anything either. Link: https://lore.kernel.org/r/a730070d718cb119f77c8ca1782a0d4189bfb3e7.1614965598.git.robin.murphy@arm.com Signed-off-by: Robin Murphy <[email protected]> Signed-off-by: Sudeep Holla <[email protected]>
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