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| author | Changhuang Liang <changhuang.liang@starfivetech.com> | 2024-02-25 21:50:24 -0800 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2024-02-26 15:09:18 +0100 |
| commit | d8c56cea725c4d46dd47fbfb4b35a37e7317ac43 (patch) | |
| tree | 4b07c93e4010ff020adc9aff46416133e3e3d520 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py | |
| parent | 3f734564a03df595c671316314b65a465d333f4a (diff) | |
dt-bindings: interrupt-controller: Add starfive,jh8100-intc
StarFive SoCs like the JH8100 use a interrupt controller. Add a binding
for it.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240226055025.1669223-2-changhuang.liang@starfivetech.com
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
0 files changed, 0 insertions, 0 deletions