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| author | Maxime Jourdan <[email protected]> | 2018-08-23 13:49:53 +0200 |
|---|---|---|
| committer | Kevin Hilman <[email protected]> | 2018-09-12 21:38:45 -0700 |
| commit | d4983983d98710e4927fdb8de8e987c303b3fba3 (patch) | |
| tree | 60753c338e54e10008487e0a9d896d7bfc3a122a /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py | |
| parent | 5516803d48ed946320aba48fdf45bad383252891 (diff) | |
soc: amlogic: add meson-canvas driver
Amlogic SoCs have a repository of 256 canvas which they use to
describe pixel buffers.
They contain metadata like width, height, block mode, endianness [..]
Many IPs within those SoCs like vdec/vpu rely on those canvas to read/write
pixels.
Reviewed-by: Jerome Brunet <[email protected]>
Tested-by: Neil Armstrong <[email protected]>
Signed-off-by: Maxime Jourdan <[email protected]>
Signed-off-by: Kevin Hilman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
0 files changed, 0 insertions, 0 deletions