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authorAswath Govindraju <[email protected]>2021-03-26 12:11:20 +0530
committerNishanth Menon <[email protected]>2021-03-26 18:10:35 -0500
commit9437499086c24abf298bc3c3a053faedfc19bab1 (patch)
treedffddd89f12fa32d776bc0af911881a2a87628b7 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parentf4cc7daf460b285d3b318496654dab01472df8e4 (diff)
arm64: dts: ti: k3-j7200: Add support for higher speed modes and update delay select values for MMCSD subsystems
The following speed modes are now supported in J7200 SoC, - HS200 and HS400 modes at 1.8 V card voltage, in MMCSD0 subsystem [1]. - UHS-I speed modes in MMCSD1 subsystem [1]. Add support for UHS-I modes by adding voltage regulator device tree nodes and corresponding pinmux details, to power cycle and voltage switch cards. Set respective tags in sdhci0 and remove no-1-8-v tag from sdhci1 device tree nodes. Also update the delay values for various speed modes supported, based on the revised january 2021 J7200 datasheet[2]. [1] - section 12.3.6.1.1 MMCSD Features, in https://www.ti.com/lit/ug/spruiu1a/spruiu1a.pdf, (SPRUIU1A – JULY 2020 – REVISED JANUARY 2021) [2] - https://www.ti.com/lit/ds/symlink/dra821u.pdf, (SPRSP57B – APRIL 2020 – REVISED JANUARY 2021) Signed-off-by: Aswath Govindraju <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Kishon Vijay Abraham I <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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