diff options
| author | Hou Zhiqiang <[email protected]> | 2019-07-05 17:56:51 +0800 |
|---|---|---|
| committer | Lorenzo Pieralisi <[email protected]> | 2019-07-08 12:39:09 +0100 |
| commit | 6f7374b871d5e55e772b532fe1c571da0fcc7164 (patch) | |
| tree | 65f7b2284f78ae6711956621600a0211df287c2b /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py | |
| parent | 7717c7d7da31befa025c4402ac1179356b00012a (diff) | |
PCI: mobiveil: Add upper 32-bit CPU base address setup in outbound window
Current code erroneously sets-up only the lower 32-bit CPU base address
in the outbound window, which results in outbound transactions not
working in 64-bit platforms.
Fix it.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Reviewed-by: Minghuan Lian <[email protected]>
Reviewed-by: Subrahmanya Lingappa <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
0 files changed, 0 insertions, 0 deletions