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authorAlexandre Ghiti <alex@ghiti.fr>2021-07-21 09:59:35 +0200
committerPalmer Dabbelt <palmerdabbelt@google.com>2021-08-06 22:41:28 -0700
commit6d7f91d914bc90a15ebc426440c26081337ceaa1 (patch)
treec7eab36885e2e1985241ad931afe48c15bc4f411 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parenta18b14d8886614b3c7d290c4cfc33389822b0535 (diff)
riscv: Get rid of CONFIG_PHYS_RAM_BASE in kernel physical address conversion
The usage of CONFIG_PHYS_RAM_BASE for all kernel types was a mistake: this value is implementation-specific and this breaks the genericity of the RISC-V kernel. Fix this by introducing a new variable phys_ram_base that holds this value at runtime and use it in the kernel physical address conversion macro. Since this value is used only for XIP kernels, evaluate it only if CONFIG_XIP_KERNEL is set which in addition optimizes this macro for standard kernels at compile-time. Signed-off-by: Alexandre Ghiti <alex@ghiti.fr> Tested-by: Emil Renner Berthing <kernel@esmil.dk> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Fixes: 44c922572952 ("RISC-V: enable XIP") Cc: stable@vger.kernel.org Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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