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authorNikola Cornij <nikola.cornij@amd.com>2021-06-07 20:36:05 -0400
committerAlex Deucher <alexander.deucher@amd.com>2021-06-21 17:45:14 -0400
commit5d9e7fe8ef9b1c91a4821eef4533f4010e011117 (patch)
tree143c2db8569be77b7bcdda5c4b803fa1b2680cec /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parentd9b20b45ec32fff5430cc57b28aa20136ef09d76 (diff)
drm/amd/display: Clamp VStartup value at DML calculations time
[why] Some timings with a large VBlank cause the value to overflow the register related, while also producing other wrong values in DML output. [how] Clamp VStartup at the DCN3.1 maximum value Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Bindu Ramamurthy <bindu.r@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
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