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authorLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>2023-11-15 20:53:33 +0000
committerMark Brown <broonie@kernel.org>2023-11-16 19:46:16 +0000
commit54a1dc08e1737552e6764f38837b19fae9548fb0 (patch)
tree824f5db58e5a744c96db23d93359c55ee04efe31 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parent3fc6350fc8470d42f5e700ecd1c3d90f9dd9fd2d (diff)
spi: dt-bindings: renesas,rspi: Document RZ/Five SoC
The RSPI block on the RZ/Five SoC is identical to one found on the RZ/G2UL SoC. "renesas,r9a07g043-rspi" compatible string will be used on the RZ/Five SoC so to make this clear and to keep this file consistent, update the comment to include RZ/Five SoC. No driver changes are required as generic compatible string "renesas,rspi-rz" will be used as a fallback on RZ/Five SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231115205333.31076-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
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