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authorRussell King <rmk+kernel@arm.linux.org.uk>2015-04-03 11:15:53 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-04-14 22:26:51 +0100
commit47b8484ea6569511a3cd915bea29886b4cd08333 (patch)
treec4f80e72ea340c972fcf55cf13b7c27d223bc31b /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parent5aca370826a2487aaaae5db31f6bb0b906e9755f (diff)
ARM: cache-v7: shift CLIDR to extract appropriate field before masking
Rather than have code which masks and then shifts, such as: mrc p15, 1, r0, c0, c0, 1 ALT_SMP(ands r3, r0, #7 << 21) ALT_UP( ands r3, r0, #7 << 27) ALT_SMP(mov r3, r3, lsr #20) ALT_UP( mov r3, r3, lsr #26) re-arrange this as a shift and then mask. The masking is the same for each field which we want to extract, so this allows the mask to be shared amongst code paths: mrc p15, 1, r0, c0, c0, 1 ALT_SMP(mov r3, r0, lsr #20) ALT_UP( mov r3, r0, lsr #26) ands r3, r3, #7 << 1 Use this method for the LoUIS, LoUU and LoC fields. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
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