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authorYazen Ghannam <[email protected]>2019-08-21 23:59:57 +0000
committerBorislav Petkov <[email protected]>2019-08-23 07:06:29 +0200
commit353a1fcb8f9e5857c0fb720b9e57a86c1fb7c17e (patch)
treef4840cefffa8a6aa9737bd4fed1ed91fb4281669 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parentf8be8e5680225ac9caf07d4545f8529b7395327f (diff)
EDAC/amd64: Initialize DIMM info for systems with more than two channels
Currently, the DIMM info for AMD Family 17h systems is initialized in init_csrows(). This function is shared with legacy systems, and it has a limit of two channel support. This prevents initialization of the DIMM info for a number of ranks, so there will be missing ranks in the EDAC sysfs. Create a new init_csrows_df() for Family17h+ and revert init_csrows() back to pre-Family17h support. Loop over all channels in the new function in order to support systems with more than two channels. Signed-off-by: Yazen Ghannam <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Cc: "[email protected]" <[email protected]> Cc: James Morse <[email protected]> Cc: Mauro Carvalho Chehab <[email protected]> Cc: Tony Luck <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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