diff options
author | Bjorn Helgaas <[email protected]> | 2022-09-09 15:25:02 -0500 |
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committer | Bjorn Helgaas <[email protected]> | 2022-09-12 15:29:47 -0500 |
commit | 2b89c22f2434b931b3cf22298ac5f5ec089e9ad1 (patch) | |
tree | d6254a0d9d3baeecf68e21441ec5b06eb44ad6dc /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py | |
parent | 91b12b2a100e977274d3c277a4ff2df0b7439e7d (diff) |
PCI/PTM: Preserve RsvdP bits in PTM Control register
Even though only the low 16 bits of PTM Control are currently defined, the
register is 32 bits wide and the unused bits are RsvdP ("Reserved and
Preserved"), so software must preserve the values of those bits when
writing the register.
Update PTM Control reads and writes to use 32-bit accesses and preserve the
reserved bits on writes.
Link: https://lore.kernel.org/r/[email protected]
Tested-by: Rajvi Jingar <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Reviewed-by: Kuppuswamy Sathyanarayanan <[email protected]>
Reviewed-by: Mika Westerberg <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
0 files changed, 0 insertions, 0 deletions