diff options
| author | Satheeshakrishna M <[email protected]> | 2014-08-22 09:49:06 +0530 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2015-04-16 11:29:05 +0200 |
| commit | 1ab23380f8b990ad865349040ec14c3ebe3a09c5 (patch) | |
| tree | 0862b833474b5e9e86a743667a51aa4f5930715d /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py | |
| parent | 535afa2e9e3c1867460d6981d879b04d8b2b9ab3 (diff) | |
drm/i915/bxt: Restrict PORT_CLK_SEL programming below gen9
PORT_CLK_SEL programming is needed only on HSW/BDW.
v2:
- don't program PORT_CLK_SEL from mst encoders either (imre)
v3:
- fix the check for GEN9+ in intel_mst_pre_enable_dp() (damien)
Signed-off-by: Satheeshakrishna M <[email protected]>
Signed-off-by: Imre Deak <[email protected]>
Reviewed-by: Sagar Kamble <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py')
0 files changed, 0 insertions, 0 deletions