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authorKonrad Dybcio <[email protected]>2023-02-13 21:55:29 +0100
committerUlf Hansson <[email protected]>2023-02-15 13:24:03 +0100
commit09e8f154fac2a5e9f2c2dfb98f2a64128b259872 (patch)
tree194d83b3666baf9e23d061b9bbd28626ad203d16 /tools/perf/scripts/python/Perf-Trace-Util/lib/Perf/Trace/EventClass.py
parentf613feec700f25231e4cfe515c710b9b7c2d1ad1 (diff)
dt-bindings: mmc: sdhci-msm: Allow 1 icc path
Some SoCs (like msm8998) only have a SDHC<->DDR path. Allow this case. Signed-off-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
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