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| author | Takashi Iwai <tiwai@suse.de> | 2024-03-11 16:18:47 +0100 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2024-03-11 16:18:47 +0100 |
| commit | f5d9ddf1214bf878ca69c905c2f410c5b51de99c (patch) | |
| tree | 3ea7bf6f519a490f72cf5f9023b5c0a6dff0fea0 /sound/soc/sof/amd/acp-dsp-offset.h | |
| parent | 6719cd5e45111449f4021e08f2e488f17a9b292b (diff) | |
| parent | 6c023ad32b192dea51a4f842cc6ecf89bb6238c9 (diff) | |
Merge tag 'asoc-v6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v6.9
This has been quite a small release, there's a lot of driver specific
cleanups and minor enhancements but hardly anything on the core and only
one new driver. Highlights include:
- SoundWire support for AMD ACP 6.3 systems.
- Support for reporting version information for AVS firmware.
- Support DSPless mode for Intel Soundwire systems.
- Support for configuring CS35L56 amplifiers using EFI calibration
data.
- Log which component is being operated on as part of power management
trace events.
- Support for Microchip SAM9x7, NXP i.MX95 and Qualcomm WCD939x
Diffstat (limited to 'sound/soc/sof/amd/acp-dsp-offset.h')
| -rw-r--r-- | sound/soc/sof/amd/acp-dsp-offset.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/sound/soc/sof/amd/acp-dsp-offset.h b/sound/soc/sof/amd/acp-dsp-offset.h index a913f1cc4c80..59afbe2e0f42 100644 --- a/sound/soc/sof/amd/acp-dsp-offset.h +++ b/sound/soc/sof/amd/acp-dsp-offset.h @@ -65,7 +65,10 @@ /* Registers from ACP_INTR block */ #define ACP3X_EXT_INTR_STAT 0x1808 #define ACP5X_EXT_INTR_STAT 0x1808 +#define ACP6X_EXTERNAL_INTR_ENB 0x1A00 +#define ACP6X_EXTERNAL_INTR_CNTL 0x1A04 #define ACP6X_EXT_INTR_STAT 0x1A0C +#define ACP6X_EXT_INTR_STAT1 0x1A10 #define ACP3X_DSP_SW_INTR_BASE 0x1814 #define ACP5X_DSP_SW_INTR_BASE 0x1814 @@ -78,6 +81,10 @@ #define ACP5X_AXI2DAGB_SEM_0 0x1884 #define ACP6X_AXI2DAGB_SEM_0 0x1874 +/* ACP common registers to report errors related to I2S & SoundWire interfaces */ +#define ACP_SW0_I2S_ERROR_REASON 0x18B4 +#define ACP_SW1_I2S_ERROR_REASON 0x1A50 + /* Registers from ACP_SHA block */ #define ACP_SHA_DSP_FW_QUALIFIER 0x1C70 #define ACP_SHA_DMA_CMD 0x1CB0 @@ -96,4 +103,7 @@ /* Cache window registers */ #define ACP_DSP0_CACHE_OFFSET0 0x0420 #define ACP_DSP0_CACHE_SIZE0 0x0424 + +#define ACP_SW0_EN 0x3000 +#define ACP_SW1_EN 0x3C00 #endif |