clk: st: STiH407: Support for Flexgen Clocks

This patch is the Flexgen implementation reusing as much as possible
of Common Clock Framework functions.

The idea is to have an instance of "struct flexgen" per output clock.
It represents the clock cross bar (by a mux element), and the pre and final dividers
(using dividers and gates elements).

Signed-off-by: Maxime Coquelin <[email protected]>
Signed-off-by: Olivier Bideau <[email protected]>
Signed-off-by: Gabriel Fernandez <[email protected]>
Acked-by: Peter Griffin <[email protected]>
Signed-off-by: Mike Turquette <[email protected]>

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