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authorMarek Vasut <[email protected]>2024-08-30 23:56:38 +0200
committerAlexandre Torgue <[email protected]>2024-09-05 11:31:56 +0200
commit7d6b8316ba139c5a7cbbaa888089d9f4eb527dc9 (patch)
treeec7553a6ee413037e874884467f5e143f1181fee /scripts/rustdoc_test_builder.rs
parent5afb9b98a748ab9c6d5800aa62d90aaa5a28daa2 (diff)
ARM: dts: stm32: Use SAI to generate bit and frame clock on STM32MP15xx DHCOM PDK2
By default the SGTL5000 derives bit and frame clock from MCLK, which does not produce particularly accurate results. The SGTL5000 PLL does improve the accuracy, but also increases power consumption. Using the SoC SAI interface as bit and frame clock source results in the best accuracy without the power consumption increase downside. Switch the bit and frame clock direction from SAI to SGTL5000, reduce mclk-fs to match. Signed-off-by: Marek Vasut <[email protected]> Signed-off-by: Alexandre Torgue <[email protected]>
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