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| author | Mike Tipton <quic_mdtipton@quicinc.com> | 2024-02-01 17:48:05 -0800 |
|---|---|---|
| committer | Georgi Djakov <djakov@kernel.org> | 2024-02-04 23:35:50 +0200 |
| commit | a40f93e9286968863c661f2b9e314d97adc2f84e (patch) | |
| tree | 9dd5c8ef8c060680fad6bb1267f8e7cd6669cc19 /scripts/rust_is_available_test.py | |
| parent | 24406f6794aa631516241deb9e19de333d6a0600 (diff) | |
interconnect: qcom: sm8650: Use correct ACV enable_mask
The ACV enable_mask is historically BIT(3), but it's BIT(0) on this
target. Fix it.
Fixes: c062bcab5924 ("interconnect: qcom: introduce RPMh Network-On-Chip Interconnect on SM8650 SoC")
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240202014806.7876-2-quic_mdtipton@quicinc.com
Signed-off-by: Georgi Djakov <djakov@kernel.org>
Diffstat (limited to 'scripts/rust_is_available_test.py')
0 files changed, 0 insertions, 0 deletions